SEMI International Standards
Date Prepared: 02/17/2005Revised (if Applicable):

Name of Task Force (TF): International Polished Wafers Task Force

Global Technical Committee: Silicon Wafer
Originating Technical Committee Region: International

1. Charter: (State the objective of the proposed TF.)
Maintain SEMI M1, Specifications for Polished Monocrystalline Silicon Wafers, including Parts 1 and 2 of the Silicon Wafer Specification Format for Order Entry, which is included in that specification.
2. Scope: (Define the specific activities that the TF will conduct.)
Monitor and maintain specifications for polished monocrystalline silicon wafers, including substrates for epitaxial and SOI wafers and starting wafers that result in further processing, such as annealed wafers. Develop and maintain specifications for basic wafer specifications as needed, and adding entries, including test methodology, to Part 2 of the Silicon Wafer Specification Format for Order Entry as required by evolving technologies for polished and other types of silicon wafers.
3. Formal linkages with TFs in other Regions/Locales: (Show each associated TF and its parent global technical committee; indicate nature of relationship – global TF, observer TF, etc.)
The intention is to make this task force international with co-leaders in each interested region. Close liaison with the M18 revision and Terminology task forces in all regions is essential.
4. Formation Date:(TF formed on)

Task Force formed on: 03/01/2005
Task Force approved by Committee/GCS on: 03/02/2005