SEMI International Standards
Technical Committee Charter
Charter of Global Assembly & Packaging Committee
Japan Packaging Committee
This committee explores, evaluates and formulates consensus-based specifications that through voluntary compliance will enhance the manufacturing capability of the semiconductor industry as it relates to the packaging and assembly of the semiconductor chip.
This includes the materials, piece parts, and interconnection schemes, and unique packaging assemblies that provide for the communication link between the semiconductor chip and the next level of integration.
Emphasis will be placed on establishing standards, guidelines, test methods, practices, and specifications for materials, equipments, physical and electrical acceptance criteria, environmental testing, and test methods for measuring these standards.
This committee also discuss total infrastructure for Chip to Final Set system and process such as Testing and Design Software, Transportation Tools, Reliability and Traceability issues, EHS issues, Inspection method and equipments and etc.
This committee also study and hold workshop to develop standards for materials which meet industry requirements on environmental issue, advanced packages such as SiP, 3D and various Modules, MEMS and MOEMS etc.
Cooperative alliances have been and will continue to be established with other standard setting organizations such as JEDEC, IPC, JEITA, JIEP, HDP User Group and ASTM, to assure complete integration of industry requirements.