SEMI International Standards
TASK FORCE ORGANIZATION FORM (TFOF)
Date Prepared:
10/26/2011
Revised (if Applicable):
Name of Task Force (TF):
3DP&I Testing Task Force
Global Technical Committee:
3D Packaging and Integration
Originating Technical Committee Region:
Taiwan
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1. Charter:
(State the objective of the proposed TF.)
The Testing Task Force will develop standards, guidelines, and/or specifications for electrical testing related activities used in 3DS-IC manufacturing for the ultimate goal of yield enhancement
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2. Scope:
(Define the specific activities that the TF will conduct.)
Activities related to electrical testing of prebond and bonded wafers/devices include (but not limited to):
Design for Test (DfT) such as test structures and placement;
Test methodologies such as contact method and test procedures;
Test fixtures such as probe card and probe interfaces, and
Data mining test results
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3. Formal linkages with TFs in other Regions/Locales:
(Show each associated TF and its parent global technical committee; indicate nature of relationship – global TF, observer TF, etc.)
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4. Formation Date:
(TF formed on)
Task Force formed on:
10/26/2011
Task Force approved by Committee/GCS on:
10/26/2011
5. Comments
Proposal to transform 3DS-IC and Assembly & Packaging Committees into a single, unified global technical committee (GTC) was approved at the International Standards Committee meeting held on July 13, 2017 during SEMICON West.
Proposal Details:
To transform the 3DS-IC GTC and the Assembly & Packaging GTC into a Unified GTC
To name the transformed GTCs as "3D Packaging and Integration" GTC
Each TC chapter of the unified GTC will inherit the co-chairs of the existing TC chapters
All records were moved to the new 3D Packaging and Integration GTC.