SEMI International Standards
Date Prepared:
Revised (if Applicable): 03/21/2005

Name of Task Force (TF): International SOI Wafers Task Force

Global Technical Committee: Silicon Wafer
Originating Technical Committee Region: International

1. Charter: (State the objective of the proposed TF.)
The recently issued SOI wafer standard, M47-1101, ‘Specification for Silicon-on Insulator (SOI) Wafers for LSI Applications” covers thin-SOI wafers with device layer thickness of 0.2 um or less, with a focus on partially-depleted CMOS applications. However, there is wide recognition that the metrology methods and materials requirements are markedly different for the ultra-thin device layers of 50 nm or less) SOI needed for CMOS transistors.
2. Scope: (Define the specific activities that the TF will conduct.)
This new standard for ultra-thin SOI wafers will address the metrology methods and materials requirements for production of CMOS circuits. This standard will address the wafer parameters critical for CMOS devices using Si device layers of 50 nm thickness or less on buried oxide thickness ranging from 0.2 um and less. This new standard will refer to single-crystalline Si device layers on un-patterned buried oxide layers and will not, at this time, cover such expected developments as ultra-thin SOI wafers using Ge-rich and strained-Si multi-layers, patterned buried oxide layers or planar dual gate structures.
3. Formal linkages with TFs in other Regions/Locales: (Show each associated TF and its parent global technical committee; indicate nature of relationship – global TF, observer TF, etc.)

4. Formation Date:(TF formed on)

Task Force formed on:
Task Force approved by Committee/GCS on: