SEMI International Standards
TASK FORCE ORGANIZATION FORM (TFOF)
Revised (if Applicable):
Name of Task Force (TF):
Electron Microscopy Workflow Task Force
Global Technical Committee:
Physical Interfaces & Carriers
Originating Technical Committee Region:
(State the objective of the proposed TF.)
With rapidly shrinking design rules extremely high resolution techniques are required for investigating nano and sub-nanometer sized features and defects in semiconductor wafers and devices in manufacturing lines for semiconductor devices Electron microscopes are capable to perform this task but so far standards are missing for operating these tools, for sample preparation and for data exchange. This lack of standards impedes the operation of electron microscopes in semiconductor device manufacturing lines as well as the exchange of information and communication between the involved parties.
Therefore this task force is chartered to develop standards needed for workflows involving electron microscopes – scanning electron microscopes as well as transmission electron microscopes – and related equipment in support of development and manufacturing of semiconductor devices as well as silicon and other semiconductor wafers.
The charter also includes any activities that are necessary for writing, maintaining, updating or improving standards such as setting up working groups, arranging workshops, round robins and phone conferences.
(Define the specific activities that the TF will conduct.)
- Developing and maintaining standards for
--operating electron microscopes (EM’s) in semiconductor device manufacturing labs and fabs,
--performing investigations with EM’s,
--preparing and transporting samples for EM’s,
--consumables used in this context.
- Identifying missing standards
- Defining and developing common understanding of terms used
- Educating industry regarding new standards
In the near term the TF will develop a specification for so-called lamella carriers used to transfer the sample from tools such as FIB’s (focused ion beam systems used for preparing TEM lamellas from full wafers) to the EM allowing to automate this process.
3. Formal linkages with TFs in other Regions/Locales:
(Show each associated TF and its parent global technical committee; indicate nature of relationship – global TF, observer TF, etc.)
Polished Wafer TF, EPI wafer TF, SOI Wafer TF (Silicon Wafer)
Inspection and Metrology TF (3DS-IC)
4. Formation Date:
(TF formed on)
Task Force formed on:
Task Force approved by Committee/GCS on:
(11/08/2017) Revision to TFOF: changing "lines" to "labs and fabs" in the scope section: "...–operating electron microscopes (EM’s) in semiconductor device manufacturing lines,..."