SEMI International Standards
Date Prepared: 09/09/2019
Revised (if Applicable):

Name of Task Force (TF): 3DS IC Bonded Layer Inspection Metrology TF

Global Technical Committee: 3D Packaging and Integration
Originating Technical Committee Region: Japan

1. Charter: (State the objective of the proposed TF.)
This Task Force will focus on the reference sample specification for multi stacked wafers/dies more than two.
2. Scope: (Define the specific activities that the TF will conduct.)
This Task Force will develop a standard focusing on quality of joint boundary between wafers/dies such as void inspection metrology by providing a specification for a reference sample with the following areas to be addressed:
Determine the specification for separating the stacked layers of more than two wafers by standardized 3D wafer structure.
Determine the identification marks and size.

3. Formal linkages with TFs in other Regions/Locales: (Show each associated TF and its parent global technical committee; indicate nature of relationship – global TF, observer TF, etc.)
PLP Panel Task Force
North America 3DP&I Inspection & Metrology Task Force
North America 3DP&I Bonded Wafer Stacks Task Force
Taiwan Middle End Process Task Force

4. Formation Date:(TF formed on)

Task Force formed on: 11/18/2019
Task Force approved by Committee/GCS on: 10/11/2019